why is the the smp_mb() in arm64's barrier.h "dmb ish"?

[K***@via-alliance.com]

Hi All,



In arch/arm64/include/asm/barrier.h, there is the definition of
smp_mb()/smp_rmb()/smp_wmb() for arm64. I noticed that all the 3 macors
are using "dmb ishxx", which is only affect the cluster of the CPU
executing the instruction. But in the big.LITTLE system, there will be 2
cluster. So the smp_mb()/smp_rmb()/smp_wmb() cannot affect all the CPU
in the system.



Is there other considerations so that smp_mb()/smp_rmb()/smp_wmb() are
implemented to "only affecting inner sharable cores"?





Best Regards,



Kelvin K. Li

---------------------------------------------------------------
Software Team, VIA Technologies, Inc.
5F, VIA Tower, 1 Zhongguancun East Road,
Haidian District, Beijing, 100084
Tel: [phone] ext.3620
mailto: ***@via-alliance.com

[Leif Lindholm]

Hi Kelvin.

Post by K***@via-alliance.com
In arch/arm64/include/asm/barrier.h, there is the definition of
smp_mb()/smp_rmb()/smp_wmb() for arm64. I noticed that all the 3 macors are
using “dmb ishxx”, which is only affect the cluster of the CPU executing the
instruction.

This is incorrect.

Post by K***@via-alliance.com
But in the big.LITTLE system, there will be 2 cluster. So the
smp_mb()/smp_rmb()/smp_wmb() cannot affect all the CPU in the system.

Yes, they do.

In a big.LITTLE HMP system, all participating CPUs are part of the
inner-shareable domain.

Regards,

Leif

[K***@via-alliance.com]

Hi Leif£¬

Why do the smp_mb()/smp_rmb()/smp_wmb() for arm (arm-32) not change to the "dmb ishxx" too?

Is there some consideration£¿

-----Original Message-----
From: Leif Lindholm [mailto:***@linaro.org]
Sent: 2014-5-1 (ÐÇÆÚËÄ) 0:39
To: Kelvin K. Li
Cc: linaro-dev
Subject: Re: why is the the smp_mb() in arm64's barrier.h "dmb ish"?

Hi Kelvin.

Post by K***@via-alliance.com
In arch/arm64/include/asm/barrier.h, there is the definition of
smp_mb()/smp_rmb()/smp_wmb() for arm64. I noticed that all the 3 macors are
using ¡°dmb ishxx¡±, which is only affect the cluster of the CPU executing the
instruction.

This is incorrect.

Post by K***@via-alliance.com
But in the big.LITTLE system, there will be 2 cluster. So the
smp_mb()/smp_rmb()/smp_wmb() cannot affect all the CPU in the system.

Yes, they do.

In a big.LITTLE HMP system, all participating CPUs are part of the
inner-shareable domain.

Regards,

Leif

[Leif Lindholm]

Hi Kelvin,

Post by K***@via-alliance.com
Why do the smp_mb()/smp_rmb()/smp_wmb() for arm (arm-32) not change to the "dmb ishxx" too?

But they do. For ARMv7, smb_mb(), smp_rmb() and smp_wmb() become dmb
ish, dmb ish and dmb ishst respectively.

This was introduced in:
https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/arch/arm/include/asm/barrier.h?id=3ea128065ed20d33bd02ff6dab689f88e38000be

/
Leif

[K***@via-alliance.com]

Hi Leif£¬

Another questions:

In Arm V8 Architecture Reference Manual£¬there is an example (see beblow) to explain the shareability attribute of clusters. It is easy to know: each cluster is corresponding to a Inner shareable domain; the two cluster comprise a Outer shareable domain.

So, how does the big.LITTLE HMP system treat two clusters as a Inner shareable domain£¿

[Leif Lindholm]

In Arm V8 Architecture Reference Manual，there is an example (see beblow) to explain the shareability attribute of clusters. It is easy to know: each cluster is corresponding to a Inner shareable domain; the two cluster comprise a Outer shareable domain.

The ARM ARM describes the architectural requirements for a system to
be able to work correctly. Specific implementations can add further
abilities within the scope of this. And Linux can then have additional
requirements for how to enable SMP/HMP..

So, how does the big.LITTLE HMP system treat two clusters as a Inner shareable domain？

Example for Cortex-A53:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0500d/ch07s02s02.html

Regards,

Leif

[K***@via-alliance.com]

Hi Leif,

I think I got it. Thank you very much.


-----Original Message-----
From: Leif Lindholm [mailto:***@linaro.org]
Sent: 2014-5-1 (ÐÇÆÚËÄ) 19:32
To: Kelvin K. Li
Cc: linaro-***@lists.linaro.org
Subject: Re: ŽðžŽ: why is the the smp_mb() in arm64's barrier.h "dmb ish"?

Post by K***@via-alliance.com
In Arm V8 Architecture Reference Manual£¬there is an example (see beblow) to explain the shareability attribute of clusters. It is easy to know: each cluster is corresponding to a Inner shareable domain; the two cluster comprise a Outer shareable domain.

The ARM ARM describes the architectural requirements for a system to
be able to work correctly. Specific implementations can add further
abilities within the scope of this. And Linux can then have additional
requirements for how to enable SMP/HMP..

Post by K***@via-alliance.com
So, how does the big.LITTLE HMP system treat two clusters as a Inner shareable domain£¿

Example for Cortex-A53:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0500d/ch07s02s02.html

Regards,

Leif